The disclosure relates generally to the fabrication of semiconductor devices, and more particularly, to semiconductor devices having contact structures with reduced gate resistance.
Electrically conductive lines providing, for example, signal transfer are essential in electronic devices as well as semiconductor integrated circuit (IC) devices. The conductive lines on different levels are connected through conductive plugs in required positions to provide a predetermined function. Continuing advances in semiconductor manufacturing processes have resulted in semiconductor devices with finer features and/or higher degrees of integration. Among the various features included within a semiconductor device, contact structures typically provide an electrical connection between circuit devices and/or interconnection layers.
A typical semiconductor device having a contact structure has a gate structure on a semiconductor substrate and a source/drain region laterally adjacent to the gate structure in the semiconductor substrate. A contact hole is formed in an interlevel dielectric (ILD) and then filled with a conductive material, for example, a tungsten contact to electrically couple to the gate structure. However, the tungsten plug provides disadvantageously high gate resistance.
It is therefore desirable to provide a semiconductor device having a contact structure and fabrication methods for reducing the gate resistance thereby improving the resistance/capacitance coupling (RC delay).